Original SEGA SC-3000/SG-1000

The main clock of the SEGA SC-3000/SG-1000 runs at 10.738635 MHz, which is used directly by the TMS9918/9929A.
The Mitsubishi MN74HC04 hex inverter mounted on board, along with some analog components, is used to divide the main clock by 3 to generate the Z80 CPU and the SN76489A audio chip clock of 3.579545 MHz.

The master clock is also divided by 2 by VDP processor (TMS9918/9929A) obtaining a 5.369317 Mhz pixel clock.

MASTERCLOCK (10.738635 MHz) => 

  1) Z80 CPU CLOCK (/3 = 3.579545 MHz)

  2) VDP INTERNAL CLOCK (10.738635 MHz)

  3) VDP PIXEL CLOCK (/2 = 5.369317 MHz)

  4) AUD PSG CLOCK (/3 = 3.579545 MHz)

The new SC-3000X

The SC-3000X board (Altera DE1) uses its internal 50Mhz clock and one PLL to obtain the 21.428571 Mhz as master clock. It is the double of original SC-3000 for future modifications.

It's also drives SDRAM controller, SDRAM memory chip, VDP controller, Z80 CPU, PSG audio chip. 

BOARD CLOCK (50 MHz) => 

  1) VGA CLOCK (/2 = 25 MHz)

  2) SDRAM CONTROLLER (*12/7 = 85.714285 MHz)

  3) MASTER CLOCK (*3/7 = 21.428571 MHz)

MASTERCLOCK (21.428571 MHz) => 

  1) Z80 CPU CLOCK (/6 = 3.571428 MHz)

  2) VDP INTERNAL CLOCK (/2 = 10.714285 MHz)

  3) VDP PIXEL CLOCK (/4 = 5.357142 MHz)

  4) AUD PSG CLOCK (/6 = 3.571428 MHz)